共 44 条
- [34] Analysis on Static Noise Margin Improvement in 40nm 6T-SRAM with Post-Process Local Electron Injected Asymmetric Pass Gate Transistor 2013 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2013,
- [36] FMAX/VMIN and noise margin impacts of aging on domino read, static write, and retention of 8T 1R1W SRAM arrays in 22nm high-k/metal-gate tri-gate CMOS 2017 SYMPOSIUM ON VLSI TECHNOLOGY, 2017, : C116 - C117
- [37] FMAX / VMIN and noise margin impacts of aging on domino read, static write, and retention of 8T 1R1W SRAM arrays in 22nm high-k/metal-gate tri-gate CMOS 2017 SYMPOSIUM ON VLSI CIRCUITS, 2017, : C116 - C117
- [38] A New Silane-Ammonia Surface Passivation Technology for Realizing Inversion-Type Surface-Channel GaAs N-MOSFET with 160 nm Gate Length and High-Quality Metal-Gate/High-k Dielectric Stack IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2008, TECHNICAL DIGEST, 2008, : 383 - +
- [40] New high-k SrTa2O6 gate dielectrics prepared by plasma-enhanced atomic layer chemical vapor deposition Japanese Journal of Applied Physics, Part 2: Letters, 2002, 41 (6 B):