AN EXTENSIBLE FAULT-TOLERANT NETWORK ARCHITECTURE

被引：0
|
作者：
GHOSE, S
SINHA, BP
DATTAGUPTA, J
机构：
[1] JADAVPUR UNIV,DEPT COMP SCI & ENGN,CALCUTTA 700037,INDIA
[2] INDIAN STAT INST,ELECTR UNIT,CALCUTTA 700035,W BENGAL,INDIA
来源：
COMPUTERS & ELECTRICAL ENGINEERING | 1993年 / 19卷 / 05期
关键词：
EXTENSIBILITY; DIAMETER; FAULT-TOLERANCE; 1-DELETED DIAMETER; VERTEX CONNECTIVITY; T-DIAGNOSABILITY; ROUTING;
D O I：
10.1016/0045-7906(93)90011-F
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A simple network architecture, obtained by augmenting a modified binary tree with a few additional edges has been proposed in this paper. The network with N nodes has less than 1.67 N edges and 0 (log N) diameter. The structure is incrementally extensible and fault-tolerant. A simple self-routing algorithm for message communication under fault-free conditions has been presented. A method for routing under faulty condition has also been discussed.
引用
收藏
页码：365 / 376
页数：12
相关论文
共 50 条
  • [1] A Fault-Tolerant Neural Network Architecture
    Liu, Tao
    Wen, Wujie
    Jiang, Lei
    Wang, Yanzhi
    Yang, Chengmo
    Quan, Gang
    PROCEEDINGS OF THE 2019 56TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2019,
  • [2] ON AN OPTIMALLY FAULT-TOLERANT MULTIPROCESSOR NETWORK ARCHITECTURE
    SENGUPTA, A
    SEN, A
    BANDYOPADHYAY, S
    IEEE TRANSACTIONS ON COMPUTERS, 1987, 36 (05) : 619 - 623
  • [3] A FAULT-TOLERANT MULTITRANSPUTER ARCHITECTURE
    KUMAR, RK
    SINHA, SK
    PATNAIK, LM
    MICROPROCESSORS AND MICROSYSTEMS, 1993, 17 (02) : 75 - 81
  • [4] ARCHITECTURE OF FAULT-TOLERANT COMPUTERS
    SIEWIOREK, DP
    COMPUTER, 1984, 17 (08) : 9 - 18
  • [5] Fault-Tolerant Architecture for AUVs
    Baraniuk, Tui
    Simoni, Roberto
    Weihmann, Lucas
    2018 IEEE/OES AUTONOMOUS UNDERWATER VEHICLE WORKSHOP (AUV), 2018,
  • [6] SAND: A fault-tolerant streaming architecture for network traffic analytics
    Liu, Qin
    Lui, John C. S.
    He, Cheng
    Pan, Lujia
    Fan, Wei
    Shi, Yunlong
    JOURNAL OF SYSTEMS AND SOFTWARE, 2016, 122 : 553 - 563
  • [7] Designing fault-tolerant network-on-chip router architecture
    Eghbal, Ashkan
    Yaghini, Pooria M.
    Pedram, H.
    Zarandi, H. R.
    INTERNATIONAL JOURNAL OF ELECTRONICS, 2010, 97 (10) : 1181 - 1192
  • [8] SAND: A Fault-Tolerant Streaming Architecture for Network Traffic Analytics
    Liu, Qin
    Lui, John C. S.
    He, Cheng
    Pan, Lujia
    Fan, Wei
    Shi, Yunlong
    2014 44TH ANNUAL IEEE/IFIP INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS AND NETWORKS (DSN), 2014, : 80 - 87
  • [9] RING NETWORK RELIABILITY AND A FAULT-TOLERANT CAMBRIDGE RING ARCHITECTURE
    CHEN, TN
    JOURNAL OF THE INSTITUTION OF ELECTRONIC AND RADIO ENGINEERS, 1986, 56 (05): : 179 - 183
  • [10] A MULTIPLE FAULT-TOLERANT PROCESSOR NETWORK ARCHITECTURE FOR PIPELINE COMPUTING
    TYSZER, J
    IEEE TRANSACTIONS ON COMPUTERS, 1988, 37 (11) : 1414 - 1418
12345