CMOS ON-CHIP CLOCK FOR DIGITAL SIGNAL PROCESSORS

被引：2

作者：

NILSSON, P ^{[1
]}

TORKELSON, M ^{[1
]}

VESTERBACKA, M ^{[1
]}

WANHAMMAR, L ^{[1
]}

机构：

[1] LINKOPING UNIV,DEPT APPL ELECTR,S-58183 LINKOPING,SWEDEN

来源：

ELECTRONICS LETTERS | 1993年 / 29卷 / 08期

关键词：

DIGITAL CIRCUITS; CMOS CIRCUITS; OSCILLATORS; INTEGRATED CIRCUITS; CIRCUIT DESIGN; CLOCKS;

D O I：

10.1049/el:19930448

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An on-chip clock for frequencies up to 190 MHz is presented. This clock generator can be used for application specific digital signal processors which are clocked faster than the off-chip system clock. It is useful for both processors with a few cycles per sample or for high frequency bit-serial processors which need a large number of cycles.

引用

页码：669 / 670

页数：2

共 4 条

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[4]

OWALL V, 1993, FEB P EDAC EUROASIC

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